The present invention relates to an interface arrangement including a very high speed pre-amplifier for operating with relatively small input signals and with high Common Mode Rejection [CMR]. More particularly, the invention relates to an interface arrangement including, between a differential pair of inputs and an output, the cascade connection of a differential pre-amplifier and a comparator.
Such an interface arrangement is generally known in the art as a fast Low Voltage Differential Signal [LVDS] circuit for interfacing electronic chips. The current standards for such a LVDS circuit specify a minimum switching threshold voltage for the small differential input signal, while the common mode input signal varies over a very large range, both at a very high frequency. Because of the small input signal, a high sensitivity is required from the interface arrangement. In the known interface arrangements, the comparator is a differential amplifier preceded by a very high-speed differential pre-amplifier with low and controlled gain. The pre-amplifier must amplify the differential signal and attenuate the common mode signal. A simple differential pair of either NMOS transistors or PMOS transistors is not able to work in this full input range. Therefore, two input differential pairs are generally put in parallel: a PMOS and a NMOS differential pair. The outputs of these two differential pairs are combined into the inputs of the comparator. Each differential pair spans a part of the input voltage range. In the middle of this voltage range both PMOS and NMOS input pairs are active, whilst for input voltages near to the ground or to the supply voltage, either only the PMOS inputs or only the NMOS inputs are active. As a consequence, the gain of the input pre-amplifier is not constant over the whole input voltage range. Traditional circuits to keep the gain constant are much too slow for complying the standard requirements and can thus not be used. Moreover, since the output of the known pre-amplifier is related to the ground or to the supply voltage, the design of the subsequent comparator or differential amplifier is more difficult. Also the offset changes between each region of operation and this has a direct impact on the signal skew.